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155 Mbps 2.7 Gbps Multirate Clock and Data Recovery ICs
Key Features
- Multi rate operation: OC-48/12/3 and (STM-16/4/1) and FEC, 1.0625�Gbps and 2.125�Gbps Fibre Channel, 1.25Nbsp;Gbps and 2.5�Gbps Gigabit Ethernet
- Adjustable loop bandwidth
- Loss of Signal (LOS) and Loss of Lock (LOL) status indication
- Automatic and manual lock to reference clock: Internal PLL maintains clock output in the absence of data
- Selectable CRU bypass mode
- On-chip input and output termination
- Selectable LVPECL Reference Frequencies: 19.44�MHz, 77.76�MHz, or 155.52�MHz (or FEC), equivalent Fibre channel/Gigabit Ethernet, other allowable frequencies
- 0.18��m CMOS technology
- 100�mV differential input sensitivity
- 500�mV typical differential data output swing
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| Product Variants | Description |
| Variant Number | Variant Description |
| Add to Cart | Category | Title | Access | Revision | Posted | Type | Size |
|
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Product Brief | VSC8222 and VSC8223 Product Brief |
|
1.0 | 01/17/2005 | 436 kB | |
| Datasheet | VSC8223 Datasheet | 4.0 | 07/06/2007 | 400 kB | |||
| User Guide | VSC8222 and VSC8223 Evaluation Board | 1.0 | 10/25/2007 | 906 kB | |||
| Reports | VSC8222RV/E and VSC8223RV/E Material Composition Declaration | 1.0 | 11/30/2006 | 650 kB | |||
| Reports | VSC8223XRV Material Composition Declaration | 1.0 | 06/20/2007 | 603 kB |
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