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Quad Port 10/100/1000BASE-T PHY and 100BASE-FX/1000BASE-X SerDes with I2C Mux and Recovered Clock Outputs

Key Features

  • ActiPHYâ„¢ link-down power savings
  • PerfectReachâ„¢ scales power based on cable length

Applications

  • SOHO media centers and VoIP gateways
  • Gigabit Ethernet (GbE) line cards, switches, and routers

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VSC8664 Image

The VSC8664 is the industry's first PHY with dual recovered clock outputs delivers carrier-quality Synchronous Ethernet. Helping OEMs to capitalize on the cost reduction and optimization of Synchronous Ethernet, the VSC8664 addresses the challenges in providing fully traceable timing across TDM backhaul links, cellular base stations, and other Synchronous Ethernet applications. With dual recovered clock outputs, the VSC8664 meets and goes beyond the requirements of the ITU-T Recommendation G.8261/Y.1361. Supporting four copper/fiber ports and SGMII MAC interfaces, the VSC8664 includes a highly integrated feature set to ensure low-cost, rapid deployment.

Add to Cart Category Title Access Revision Posted Type Size
Product Brief Energy Efficient Solutions for Ethernet Electronics Access Granted 1.2 04/26/2010 pdf 1 MB
Product Brief VSC8664 Product Brief Access Granted 1.2 02/11/2008 pdf 357 kB
Datasheet VSC8664 Datasheet Access Restricted 4.1 06/10/2009 pdf 870 kB
Application Note ActiPHY Power Management Access Granted 1.0 07/01/2009 pdf 76 kB
Application Note Gigabit Ethernet PHY Latency Report Access Granted 1.2 04/21/2010 pdf 84 kB
Application Note Magnetics Guide Access Granted 1.2 07/01/2009 pdf 373 kB
Application Note PMA Testing for 100/1000BASE-T Access Granted 1.0 07/01/2009 pdf 231 kB
Application Note SimpliPHY Dual Media Copper/Fiber/SFP Access Granted 2.2 07/21/2009 pdf 173 kB
Application Note Transformerless Ethernet Designs Access Granted 1.1 07/01/2009 pdf 81 kB
Application Note VeriPHY Cable Diagnostics Access Granted 1.0 07/01/2009 pdf 108 kB
Application Note VSC8664 Synchronous Ethernet Interoperability Test Results Access Restricted 1.0 11/05/2008 pdf 397 kB
Application Note Dual SerDes Advantages Access Restricted 1.1 02/11/2008 pdf 74 kB
Application Note The VSC8664 PHY in Synchronous Ethernet Applications Access Restricted 1.0 05/27/2008 pdf 163 kB
Application Note VSC8664 PCB Design and Layout Guide Access Restricted 1.0 02/11/2008 pdf 158 kB
Evaluation System VSC8664 Evaluation Platform Access Restricted 1.0 03/06/2008 zip 4 MB
User Guide Copper PHY Bring Up Guide Access Granted 1.0 07/21/2009 pdf 76 kB
Model SPICE Model Access Granted 1.0 09/03/2010 zip 1 MB
Model IBIS Model Access Restricted 0.1 05/20/2009 zip 251 kB
Model OrCAD Symbol Access Restricted 1.0 02/11/2008 zip 5 kB
Model VSC8664 BSDL File Access Restricted 1.1 05/29/2009 zip 7 kB
Reference Design Reference Design Schematics for VSC8664 and VSC8634 Access Restricted 0.2 02/14/2008 pdf 1 MB
Software PHY API Software and Programmers Guide Access Restricted 2.44 03/09/2009 zip 109 kB
White Paper Carrier Ethernet: Solving the TDM Design Challenge Access Restricted 1.0 09/22/2009 pdf 136 kB
White Paper End-to-End Transport: The Complementary Nature of MPLS and Ethernet Access Restricted 1.0 05/05/2010 pdf 86 kB
Reports UNH Reports Access Granted 2.1 09/03/2010 zip 6 MB
Reports VSC8654IC, VSC8634IC, VSC8664IC and VSC8664IC-03 Material Composition Declaration Access Restricted 2.0 07/22/2009 pdf 1 MB
Reports VSC8654XIC, VSC8634XIC, VSC8664XIC and VSC8664XIC-03 Material Composition Declaration Access Restricted 1.0 02/17/2009 pdf 1 MB
Reports VSC8654XIC, VSC8634XIC, VSC8664XIC and VSC8664XIC-03 Material Composition Declaration Access Restricted 1.0 10/15/2008 pdf 1 MB
Reports First Level Product Qualification Report for VSC8664IC Access Restricted 1.0 03/11/2009 pdf 26 kB
Reports First Level Product Qualification Report for VSC8664IC-03 Access Restricted 1.0 04/15/2009 pdf 26 kB
Reports First Level Product Qualification Report for VSC8664XIC Access Restricted 1.0 04/15/2009 pdf 26 kB
Reports First Level Product Qualification Report for VSC8664XIC-03 Access Restricted 1.0 04/15/2009 pdf 26 kB

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