SONET/SDH-PHYs

155/622 Mbps (OC-3/12/STM-1/4) Clock and Data Recovery

155/622 Mbps (OC-3/12/STM-1/4) Clock and Data Recovery

The VSC8115 functions as a Clock and Data Recovery (CDR) unit for SONET/SDH-based equipment to derive highspeed timing signals. The VSC8115 recovers the clock from the scrambled NRZ data operating at 622.08Mb/s (STS-12/OC- 12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1). After the clock is recovered, the data is retimed using an output flipflop. In the absence of a invalid signal, the PLL will lock to the reference clock, providing the downstream device a constant clock signal, and reducing the relocking time.

First generation products are available through 2010. Second generation products are sampling now.

Product Variants Description
VSC8115XYA-05-T 2nd generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, 0 ºC to 85 ºC case temperature range, lead-free second-level interconnect, tape & reel
VSC8115YA-06-T 2nd generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -40 ºC to 95 ºC case temperature range, tape & reel
VSC8115XYA-06-T 2nd generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -40 ºC to 95 ºC case temperature range, lead-free second-level interconnect, tape & reel
VSC8115YA 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, 0 ºC to 70 ºC case temperature range
VSC8115XYA 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, 0 ºC to 70 ºC case temperature range, lead-free second-level interconnect
VSC8115YA-T 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, 0 ºC to 70 ºC case temperature range, tape & reel
VSC8115XYA-T 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, 0 ºC to 70 ºC case temperature range, lead-free second-level interconnect, tape & reel
VSC8115YA-02 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -40 ºC to 85 ºC case temperature range
VSC8115XYA-02 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -40 ºC to 85 ºC case temperature range, lead-free second-level interconnect
VSC8115YA-02-T 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -40 ºC to 85 ºC case temperature range, tape & reel
VSC8115XYA-02-T 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -40 ºC to 85 ºC case temperature range, lead-free second-level interconnect, tape & reel
VSC8115YA-03 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -20 ºC to 85 ºC case temperature range
VSC8115XYA-03 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -20 ºC to 85 ºC case temperature range, lead-free second-level interconnect
VSC8115YA-03-T 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -20 ºC to 85 ºC case temperature range, tape & reel
VSC8115XYA-03-T 1st generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, -20 ºC to 85 ºC case temperature range, lead-free second-level interconnect, tape & reel
VSC8115YA-05-T [Discontinued] 2nd generation product. 20-pin TSSOP, 4.40 mm x 6.50 mm body, 0 ºC to 85 ºC case temperature range, tape & reel
Add to Cart Category Title Access Revision Posted Type Size
Product Brief VSC8115 Product Brief Access Granted 1.0 01/17/2005 pdf 151 kB
Product Brief VSC8115-05 and VSC8115-06 Product Brief Access Granted 1.0 03/18/2009 pdf 153 kB
Datasheet VSC8115 Datasheet Access Restricted 4.4 10/10/2005 pdf 151 kB
Datasheet VSC8115-05 and VSC8115-06 Datasheet Access Restricted 4.0 05/22/2009 pdf 439 kB
Application Note Migrating VSC8115-02/-03 to VSC8115-05/-06 Access Restricted 1.0 11/01/2010 pdf 79 kB
Application Note Using the VSC8115 in place of the AMCC S3027 Access Restricted 1.0 07/05/2005 pdf 121 kB
Evaluation System VSC8115 Bill Of Materials Access Restricted 1.0 07/05/2005 pdf 42 kB
Evaluation System VSC8115 PCB Layout Access Restricted A 07/05/2005 pdf 277 kB
Evaluation System VSC8115 Schematic Access Restricted A 07/05/2005 pdf 152 kB
User Guide VSC8115 Quick Start Guide Access Restricted 1.0 01/04/2008 pdf 813 kB
Model VSC8115 IBIS Model Access Restricted 1.1 07/05/2005 zip 13 kB
Reports First Level Product Qualification Report for VSC8115XYA Access Restricted 1.0 07/28/2011 pdf 63 kB
Reports First Level Product Qualification Report for VSC8115XYA-02 Access Restricted 1.0 07/28/2011 pdf 62 kB
Reports First Level Product Qualification Report for VSC8115YA Access Restricted 1.0 07/28/2011 pdf 63 kB
Reports First Level Product Qualification Report for VSC8115YA-03 Access Restricted 1.0 12/14/2010 pdf 62 kB
Reports VSC8115XYA-T, VSC8115XYA-02-T, VSC8115XYA-03-T, VSC8115XYA-05-T and VSC8115XYA-06-T Material Composition Declaration Access Restricted 3.0 11/15/2013 pdf 20 kB
Reports VSC8115YA and VSC8115YA-T Material Composition Declaration Access Restricted 4.0 01/13/2011 pdf 22 kB
Reports VSC8115YA-02, VSC8115YA-02-T, VSC8115YA-03, VSC8115YA-03-T, VSC8115YA-05-T, VSC8115YA, VSC8115YA-T and VSC8115YA-06-T Material Composition Declaration Access Restricted 4.0 06/23/2011 pdf 22 kB
Reports First Level Product Qualification Report for VSC8115XYA-05 Access Restricted 2.0 10/01/2012 pdf 50 kB
Reports First Level Product Qualification Report for VSC8115XYA-06 Access Restricted 2.0 10/01/2012 pdf 50 kB
Reports First Level Product Qualification Report for VSC8115YA-05 Access Restricted 1.0 02/19/2009 pdf 26 kB
Reports First Level Product Qualification Report for VSC8115YA-06 Access Restricted 2.0 10/01/2012 pdf 50 kB

Key Features

  • Performs clock and data recovery for OC-12 (STM-4) and OC-3 (STM-1) NRZ data
  • Low power: 188 mW typical power dissipation
  • High-speed outputs can be configured for LVPECL or LVDS levels
  • Signal and lock detect status outputs
  • PLL-bypass operation facilitates board debug process
  • Automatic lock to reference

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